Notice Board :

Call for Paper
Vol. 16 Issue 4

Submission Start Date:
April 01, 2024

Acceptence Notification Start:
April 10, 2024

Submission End:
April 25, 2024

Final MenuScript Due:
April 30, 2024

Publication Date:
April 30, 2024
                         Notice Board: Call for PaperVol. 16 Issue 4      Submission Start Date: April 01, 2024      Acceptence Notification Start: April 10, 2024      Submission End: April 25, 2024      Final MenuScript Due: April 30, 2024      Publication Date: April 30, 2024




Volume XII Issue VII

Author Name
Poonam Dubey, Gurpreet Singh
Year Of Publication
2020
Volume and Issue
Volume 12 Issue 7
Abstract
In these paper reversible logic circuits has attracted considerable attention in improving some fields like nanotechnology, quantum computing, and low power design. In this paper 4 bit reversible comparator based on classical logic circuit is represented which uses existing reversible gates. In this design we try to reduce optimization parameters like number of constant inputs, garbage outputs, and quantum cost. The results show that, the proposed comparator has 4 quantum cost and one constant input less than the prior design.
PaperID
2020/EUSRM/7/2020/57229

Author Name
Poonam Dubey1, Gurpreet Singh
Year Of Publication
2020
Volume and Issue
Volume 12 Issue 7
Abstract
Programmable reversible logic is emerging as a prospective logic design style for implementation in modern nanotechnology and quantum computing with minimal impact on circuit heat generation. Recent advances in reversible logic using and quantum computer algorithms allow for improved computer architecture and arithmetic logic unit designs. In reversible logic gates there is a unique one-to-one mapping between the inputs and outputs. To generate a useful gate function the reversible gates require some constant ancillary inputs called ancilla inputs. Also to maintain the reversibility of the circuits some additional unused outputs are required that are referred as the garbage outputs. The number of ancilla inputs, number of garbage outputs and quantum cost plays an important role in the evaluation of reversible circuits. Thus minimizing these parameters are important for designing an efficient reversible circuit. In this thesis 4 bit reversible comparator based on cl
PaperID
2020/EUSRM/7/2020/57230

Author Name
Preeti Kirar1, Gurpreet Singh
Year Of Publication
2020
Volume and Issue
Volume 12 Issue 7
Abstract
Recently, ‘Liquid crystal display (LCD) vs. organic light-emitting diode (OLED) display who wins has become a topic of heated debate. In this review, we perform a systematic and comparative study of these two flat panel display technologies. First, we review recent advances in LCDs and OLEDs, including material development, device configuration and system integration. Next we analyze and compare their performances by six key display metrics: response time, contrast ratio, color gamut, lifetime, power efficiency, and panel flexibility.
PaperID
2020/EUSRM/7/2020/57231

Author Name
Preeti Kirar, Gurpreet Singh
Year Of Publication
2020
Volume and Issue
Volume 12 Issue 7
Abstract
Evolution of Low-Power High- Speed Rail-to-Rail Buffer Amplifier for LCD Applications liquid crystal display (LCD) television (TV), there is a large demand for developing high resolution, high color depth driver ICs. The panel of an LCD-TV is larger and higher definition than that of a computer monitor and its color quality requires more accuracy. For example, computer monitors have (262,144) or (16,777,216) colors. However, the LCD-TV needs (1,073,741,824) colors. In order to develop a highquality display module, the driver system should be promoted to higher color depth and resolution. The evolution of compact, light-weight, lowpower, and high-quality displays has caused a large demand for liquid crystal display (LCD) drivers, with features such as low cost, low power dissipation, high speed, and high resolution. An LCD driver is generally composed of column drivers, gate drivers, a timing controller, and a reference source. Column drivers are especially importan
PaperID
2020/EUSRM/7/2020/57232